Voltage self-boosting circuit for generating a boosted voltage for driving a word line write in a memory array for a memory write operation
US9633706B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2016 |
| Grant date | Apr 25, 2017 |
| Priority date | — |
| Expiry date | Oct 10, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/1697
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A voltage self-boosting circuit for generating a boosted voltage for driving a word line write in a memory array for a memory write operation is provided. A voltage generation circuit(s) is configured to generate a read voltage for a memory read operation and a write voltage for a memory write operation based on a predefined supply voltage. For the memory write operation, a delay circuit delays the delay circuit enable signal by a predetermined delay to generate the output voltage control signal. Accordingly, the voltage generation circuit(s) generates boosted voltage that drives the write voltage to a selected word line(s). For the memory read operation, the voltage generation circuit(s) does not generate the boosted voltage and thus drives the read voltage to the selected word line(s). Hence, it is possible to reduce power consumption and timing delay during the memory read operation or the memory write operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.