Air-gap forming techniques for interconnect structures
US9633897B2 · kind B2 · utility
1Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2016 |
| Grant date | Apr 25, 2017 |
| Priority date | — |
| Expiry date | Jun 1, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to a method of forming an interconnect structure. In some embodiments, the method is performed by forming a trench within a first dielectric layer and forming sacrificial spacers along sidewalls of the trench. The trench is filled with a conductive material, and the sacrificial spacers are removed after the trench has been filled with the conductive material. A second dielectric layer is formed over the first dielectric layer to leave an air-gap in a region from which the sacrificial spacers were removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.