Integrated circuit die with corner IO pads
US9633959B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2015 |
| Grant date | Apr 25, 2017 |
| Priority date | — |
| Expiry date | Mar 21, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/06179
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) die has side input/output (IO) pads located along each side of the die interior. Each die corner has a corner IO pad. The side IO pads adjacent to the corner IO pads have shortened passivation regions in the top metal layer (TML) that define TML access regions. TML traces run through the TML access regions to connect the corner IO pads to the die interior. Providing corner IO pads enables an IC die to have up to four more IO pads than a comparable conventional IC die that does not have any corner IO pads, or an IC die to have the same number of IO pads within a smaller overall footprint.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.