Patent · US Active

System in package fan out stacking architecture and process flow

US9633974B2 · kind B2 · utility

39Cited by
4References
16Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 4, 2015
Grant dateApr 25, 2017
Priority date
Expiry dateMar 4, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/19105
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Packages and methods of formation are described. In an embodiment, a system in package (SiP) includes first and second redistribution layers (RDLs), and a plurality of die attached to the front and back side of the first RDL. The first and second RDLs are coupled together with a plurality of conductive pillars extending from the back side of the first RDL to a front side of the second RDL.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.