Semiconductor device and method of manufacturing the same
US9634016B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2015 |
| Grant date | Apr 25, 2017 |
| Priority date | — |
| Expiry date | Sep 16, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate having a cell region, wherein a contact region, page buffer regions, and a scribe lane region are defined around the cell region; a cell structure located in the cell region, including first conductive layers and first insulating layers which are alternately stacked, and having a non-stepped shape; a contact structure located in the contact region, including second conductive layers and second insulating layers which are alternately stacked, and having a stepped shape; a first dummy structure located in the page buffer region, including first sacrificial layers and third insulating layers which are alternately stacked, and having the non-stepped shape; and a second dummy structure located in the scribe lane region, including second sacrificial layers and fourth insulating layers which are alternately stacked, and having the stepped shape.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.