Patent · US Active

Method for manufacturing a transistor device comprising a germanium channel material on a silicon based substrate, and associated transistor device

US9640411B2 · kind B2 · utility

0Cited by
3References
13Claims
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Key dates

Filing dateNov 5, 2015
Grant dateMay 2, 2017
Priority date
Expiry dateNov 5, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/832
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Method for manufacturing a transistor device comprising a germanium channel material on a silicon based substrate, the method comprising providing a shallow trench isolation (STI) substrate comprising a silicon protrusion embedded in STI dielectric structures, and partially recessing the silicon protrusion in order to provide a trench in between adjacent STI structures, and to provide a V-shaped groove at an upper surface of the recessed protrusion. The method also includes growing a Si1-xGex SRB layer in the trenches, and growing a germanium based channel layer on the Si1-xGex SRB layer. In this example, the Si1-xGex SRB layer comprises a germanium content x that is within the range of 20% to 99%, and the SRB layer has a thickness less than 400 nm. The present disclosure also relates to an associated transistor device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.