Roger Loo
16Patents
4h-index
26Co-inventors
56Inventor score
Filing activity: Jan 13, 2004 → Apr 26, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8415209B2 | Method of manufacturing a complementary nanowire tunnel field effect transistor semiconductor device | Electricity | 28 | Active |
| US6906400B2 | SiGe strain relaxed buffer for high mobility devices and a method of fabricating it | Electricity | 25 | Expired |
| US8384195B2 | Nanochannel device and method for manufacturing thereof | Electricity | 14 | Active |
| US9177812B2 | Method of manufacturing low resistivity contacts on n-type germanium | Electricity | 4 | Active |
| US8507337B2 | Method for doping semiconductor structures and the semiconductor device thereof | Electricity | 3 | Active |
| US8962369B2 | Method for doping semiconductor structures and the semiconductor device thereof | Electricity | 2 | Active |
| US9478544B2 | Method for forming a germanium channel layer for an NMOS transistor device, NMOS transistor device and CMOS device | Electricity | 1 | Active |
| US9502415B2 | Method for providing an NMOS device and a PMOS device on a silicon substrate and silicon substrate comprising an NMOS device and a PMOS device | Electricity | 0 | Active |
| US9640411B2 | Method for manufacturing a transistor device comprising a germanium channel material on a silicon based substrate, and associated transistor device | Electricity | 0 | Active |
| US12336239B2 | Tensile strained semiconductor monocrystalline nanostructure | Electricity | 0 | Active |
| US8865582B2 | Method for producing a floating gate memory structure | Electricity | 0 | Active |
| US8709918B2 | Method for selective deposition of a semiconductor material | Electricity | 0 | Active |
| US9299563B2 | Method for forming a strained semiconductor structure | Electricity | 0 | Active |
| US8158451B2 | Method for manufacturing a junction | Electricity | 0 | Active |
| US9263263B2 | Method for selective growth of highly doped group IV—Sn semiconductor materials | Electricity | 0 | Active |
| US8530339B2 | Method for direct deposition of a germanium layer | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.