Inter-processor communication techniques in a multiple-processor computing platform
US9645866B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2011 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | Apr 29, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T1/60
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This disclosure describes communication techniques that may be used within a multiple-processor computing platform. The techniques may, in some examples, provide software interfaces that may be used to support message passing within a multiple-processor computing platform that initiates tasks using command queues. The techniques may, in additional examples, provide software interfaces that may be used for shared memory inter-processor communication within a multiple-processor computing platform. In further examples, the techniques may provide a graphics processing unit (GPU) that includes hardware for supporting message passing and/or shared memory communication between the GPU and a host CPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.