Alexei V. Bourd
32Patents
5h-index
49Co-inventors
69Inventor score
Filing activity: Aug 30, 2004 → Oct 16, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7737985B2 | Pixel cache for 3D graphics circuitry | Physics | 33 | Active |
| US9652284B2 | GPU divergence barrier | Physics | 16 | Active |
| US9626234B2 | Inter-processor communication techniques in a multiple-processor computing platform | Physics | 15 | Active |
| US10026145B2 | Resource sharing on shader processor of GPU | Physics | 7 | Active |
| US9645866B2 | Inter-processor communication techniques in a multiple-processor computing platform | Physics | 6 | Active |
| US9218289B2 | Multi-core compute cache coherency with a release consistency memory ordering model | Physics | 5 | Active |
| US8269775B2 | Discarding of vertex points during two-dimensional graphics rendering using three-dimensional graphics hardware | Physics | 4 | Active |
| US8355028B2 | Scheme for varying packing and linking in graphics systems | Physics | 4 | Active |
| US8937622B2 | Inter-processor communication techniques in a multiple-processor computing platform | Physics | 4 | Active |
| US11861785B2 | Generation of tight world space bounding regions | Physics | 3 | Active |
| US10210593B2 | Adaptive context switching | Physics | 2 | Active |
| US7505043B2 | Cache efficient rasterization of graphics data | Physics | 2 | Expired |
| US8760457B2 | Data access tool for programmable graphics hardware | Physics | 2 | Active |
| US9430807B2 | Execution model for heterogeneous computing | Physics | 2 | Active |
| US11508109B2 | Methods and apparatus for machine learning rendering | Physics | 1 | Active |
| US9804995B2 | Computational resource pipelining in general purpose graphics processing unit | Physics | 1 | Active |
| US8884972B2 | Graphics processor with arithmetic and elementary function units | Physics | 1 | Active |
| US9019289B2 | Execution of graphics and non-graphics applications on a graphics processing unit | Emerging Cross-Sectional Technologies | 1 | Active |
| US9075913B2 | Validation of applications for graphics processing unit | Physics | 1 | Active |
| US10241799B2 | Out-of-order command execution with sliding windows to maintain completion statuses | Physics | 1 | Active |
| US9256915B2 | Graphics processing unit buffer management | Physics | 1 | Active |
| US9230518B2 | Fault-tolerant preemption mechanism at arbitrary control points for graphics processing | Physics | 0 | Active |
| US12249021B2 | Accelerated bounding volume hierarchy (BVH) traversal for ray tracing | Physics | 0 | Active |
| US10055342B2 | Hardware-based atomic operations for supporting inter-task communication | Physics | 0 | Active |
| US12045928B2 | Ray tracing processor | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.