Transistor device and a method of manufacturing same
US9646892B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2015 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | Sep 8, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/859
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A transistor device is provided that includes a substrate, a first channel region formed in a first portion of the substrate and being doped with a dopant of a first type of conductivity, a second channel region formed in a second portion of the substrate and being doped with a dopant of a second type of conductivity, a gate insulating layer formed on the first channel region and on the second channel region, a dielectric capping layer formed on the gate insulating layer, a first gate region formed on the dielectric capping layer over the first channel region, and a second gate region formed on the dielectric capping layer over the second channel region, wherein the first gate region and the second gate region are made of the same material, and wherein one of the first gate region and the second gate region comprises an ion implantation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.