Non-volatile memory device
US9646984B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2016 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | Sep 14, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/35
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory device is provided. The non-volatile memory device includes a channel structure that is located on a substrate and extends perpendicularly to the substrate, a conductive pattern that extends perpendicularly to the substrate and is spaced apart from the channel structure, an electrode structure that is located between the channel structure and the conductive pattern, and comprises a plurality of gate patterns and a plurality of insulation patterns that are alternately laminated. An insulating layer that contacts with a top surface of the conductive pattern is formed along side surfaces of the electrode structure. The top surface of the conductive pattern is formed to be lower than the top surface of the channel structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.