Electronic device of vertical MOS type with termination trenches having variable depth
US9647061B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 23, 2015 |
| Grant date | May 9, 2017 |
| Priority date | — |
| Expiry date | Nov 23, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/109
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic device is integrated on a chip of semiconductor material having a main surface and a substrate region with a first type of conductivity. The electronic device has a vertical MOS transistor, formed in an active area having a body region with a second conductivity type. A set of one or more cells each one having a source region of the first conductivity, a gate region of electrically conductive material in a gate trench extending from the main surface in the body region and in the substrate region, and an insulating gate layer, and a termination structure with a plurality of termination rings surrounding at least part of the active area on the main surface, each termination ring having a floating element of electrically insulating material in the termination trench extending from the main surface in the chip and at least one bottom region of said semiconductor material of the second conductivity type extending from at least one deepest portion of a surface of the termination trench in the chip; the termination trenches have a depth from the main surface decreasing moving away from the active area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.