Multiple chunk support for memory corruption detection architectures
US9652375B2 · kind B2 · utility
13Cited by
1References
20Claims
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Key dates
| Filing date | Jun 22, 2015 |
| Grant date | May 16, 2017 |
| Priority date | — |
| Expiry date | Nov 12, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1044
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory corruption detection technologies are described. An example processing system includes a processing core including a register to store an address of a memory corruption detection (MCD) table. The processing core can allocate a memory block of pre-determined size and can allocate a plurality of buffers within the memory block using a memory metadata word stored in an entry of the MCD table. The memory metadata word can include metadata that can identify a first bit range within the memory block for a first buffer and a second bit range within the memory block for a second buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.