Moving data between caches in a heterogeneous processor system
US9652390B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 5, 2014 |
| Grant date | May 16, 2017 |
| Priority date | — |
| Expiry date | Dec 8, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/507
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus, computer readable medium, integrated circuit, and method of moving a plurality of data items to a first cache or a second cache are presented. The method includes receiving an indication that the first cache requested the plurality of data items. The method includes storing information indicating that the first cache requested the plurality of data items. The information may include an address for each of the plurality of data items. The method includes determining based at least on the stored information to move the plurality of data items to the second cache. The method includes moving the plurality of data items to the second cache. The method may include determining a time interval between receiving the indication that the first cache requested the plurality of data items and moving the plurality of data items to the second cache. A scratch pad memory is disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.