Middle-of-line integration methods and semiconductor devices

US9653399B2 · kind B2 · utility

Assignee

• QUALCOMM Incorporated · US

Inventors

• John Jianhong Zhu · San Diego, US
• Da Yang · San Diego, US
• Jeffrey Junhao Xu · San Diego, US
• Stanley Seungchul Song · San Diego, US
• Kern Rim · Yorktown Heights, US

Key dates

• Filing date: Feb 13, 2015
• Grant date: May 16, 2017
• Expiry date: Feb 13, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76831
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An electronic device includes a middle-of-line (MOL) stack. The electronic device includes a top local interconnect layer and a contact coupling the top local interconnect layer to a gate of a semiconductor device through a first dielectric layer. The electronic device also includes one or more isolation walls between the contact and the first dielectric layer, wherein the one or more isolation walls include aluminum nitride (AlN).