LED packages and related methods
US9653656B2 · kind B2 · utility
0Cited by
47References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 16, 2012 |
| Grant date | May 16, 2017 |
| Priority date | — |
| Expiry date | Oct 3, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/49113
Abstract
An LED package with trenches traversing a die pad to provide a mechanical interlock mechanism to strengthen bonding between the die pad and an insulator such that de-lamination is less likely to occur between the die pad and the insulator. A chip carrying region is defined by a barrier portion formed by the insulator in the trenches and in gaps between electrodes and the die pad, such that a light converting layer is confined within the barrier portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.