Patent · US Active

Systems and methods for clock distribution in a die-to-die interface

US9654090B2 · kind B2 · utility

0Cited by
6References
17Claims
0Family size

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Key dates

Filing dateApr 25, 2016
Grant dateMay 16, 2017
Priority date
Expiry dateApr 25, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/15311
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Circuits for die-to-die clock distribution are provided. A system includes a transmit clock tree on a first die and a receive clock tree on a second die. The transmit clock tree and the receive clock tree are the same, or very nearly the same, so that the insertion delay for a given bit on the transmit clock tree is the same as an insertion delay for a bit corresponding to the given bit on the receive clock tree. While there may be clock skew from bit-to-bit within the same clock tree, corresponding bits on the different die experience the same clock insertion delays.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.