Signal monitoring of through-wafer vias using a multi-layer inductor
US9658255B2 · kind B2 · utility
1Cited by
12References
20Claims
0Family size
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Key dates
| Filing date | Aug 20, 2015 |
| Grant date | May 23, 2017 |
| Priority date | — |
| Expiry date | Aug 20, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19104
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
According to a method herein, a multi-level inductor is created around a through-silicon-via (TSV) in a semiconductor substrate. A voltage induced in the multi-level inductor by current flowing in the TSV is sensed, using a computerized device. The voltage is compared to a reference voltage, using the computerized device. An electrical signature of the TSV is determined based on the comparing the voltage to the reference voltage, using the computerized device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.