Semiconductor memory device
US9659663B2 · kind B2 · utility
8Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 12, 2015 |
| Grant date | May 23, 2017 |
| Priority date | — |
| Expiry date | Mar 16, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a semiconductor memory device includes: a first memory cell; a second memory cell; a first word line coupled to the first memory cell; and a second word line coupled to the second memory cell. When data is read from the first memory cell, a first voltage and a second voltage is applied to the first word line. A voltage of the second word line changes a first number of times while the first voltage is applied to the first word line, and the voltage changes a second number of times different from the first number of times while the second voltage is applied to the first word line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.