Electronic chip comprising transistors with front and back gates

US9660034B1 · kind B1 · utility

Assignee

• STMicroelectronics SA

Inventor

• Philippe Galy · Meylan, FR

Key dates

• Filing date: Aug 5, 2016
• Grant date: May 23, 2017
• Expiry date: Aug 5, 2036

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/85

Abstract

An integrated circuit includes SOI-type MOS transistors on insulator, with a first well capable of being biased located under the insulator. The first wells are doped with a first conductivity type. Each first well includes, under the insulator of each transistor, a back gate region that is more heavily doped than the first well. The first wells are separated from each other by inclusion in in a second well that is also capable of being biased. The second well is doped with a second conductivity type.