Electronic packages and methods of making and using the same
US9666516B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2014 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Dec 1, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic package and a method of making the same in provided. The electronic package includes a dielectric layer and a conformal masking layer disposed on at least a portion of the dielectric layer. The electronic package further includes a routing layer disposed on at least a portion of the masking layer and a micro-via disposed at least in part in the conformal masking layer and the routing layer. Further, at least a portion of the routing layer forms a conformal electrically conductive layer in at least a portion of the micro-via. Also, the conformal masking layer is configured to define a size of the micro-via. The electronic package further includes a semiconductor die operatively coupled to the micro-via.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.