Patent · US Active

Multichip modules and methods of fabrication

US9666559B2 · kind B2 · utility

61Cited by
24References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 24, 2015
Grant dateMay 30, 2017
Priority date
Expiry dateJul 24, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/3511
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

In a multi-chip module (MCM), a “super” chip (110N) is attached to multiple “plain” chips (110F; “super” and “plain” chips can be any chips). The super chip is positioned above the wiring board (WB) but below at least some of plain chips (110F). The plain chips overlap the super chip. Further, the plain chips' low speed IOs can be connected to the WB by long direct connections such as bond wires (e.g. BVAs) or solder stacks; such connections can be placed side by side with the super chip. Such connections can be long, so the super chip is not required to be thin. Also, if through-substrate vias (TSVs) are omitted, the manufacturing yield is high and the manufacturing cost is low. Other structures are provided that combine the short and long direct connections to obtain desired physical and electrical properties.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.