Flash cell and forming process thereof
US9666680B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 18, 2015 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Nov 26, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A flash cell includes a gate and an erase gate. The gate is disposed on a substrate, wherein the gate includes a control gate on the substrate and a floating gate having a tip between the substrate and the control gate. The erase gate is disposed beside the gate, wherein the tip points toward the erase gate. The present invention also provides a flash cell forming process including the following steps. A gate is formed on a substrate, wherein the gate includes a floating gate on the substrate. An implantation process is performed on a side part of the floating gate, thereby forming a first doped region in the side part. At least a part of the first doped region is oxidized, thereby forming a floating gate having a tip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.