Dither circuit for high-resolution analog-to-digital converters
US9667267B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2015 |
| Grant date | May 30, 2017 |
| Priority date | — |
| Expiry date | Jan 28, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/742
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A dither circuit for high-resolution analog-to-digital converters (ADCs) is presented, including a settable pseudorandom sequence generator, a trimming module, a trimmable digital-to-analog conversion circuit, a dither introduced circuit and a dither elimination circuit, wherein the settable pseudorandom sequence generator works to generate pseudorandom sequence signal uncorrelated to analog input signal and its output can be set, of which n bit output is taken as digital dither signal and n can be less than the quantization bit of the ADC; the trimming module works to determine the trimming signals for the trimmable digital-to-analog conversion circuit to convert the digital dither signal into analog dither signal precisely; the dither introduced circuit works to introduce the analog dither signal to the ADC; the dither elimination circuit works to remove the digital dither signal from the output of ADC. The dither circuit features less complexity and better dynamic performance for high-resolution ADC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.