Conditional reference voltage calibration of a memory system in data transmisson
US9672882B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2016 |
| Grant date | Jun 6, 2017 |
| Priority date | — |
| Expiry date | Mar 29, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for memory subsystem calibration in which periodic calibrations of a data strobe delay and reference voltage are scheduled. After a first calibration, a reference score is determined based on a parameter of an eye opening. On a next scheduled calibration thereafter, the data strobe delay is calibrated at the most recent value of the reference voltage. A score is then determined, and compared to the reference score. If the score is within a specified range of the reference score, then no calibration of the reference voltage is performed on the current cycle. Otherwise, the reference voltage is calibrated as well.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.