Semiconductor memory device and operating method thereof
US9672914B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 6, 2016 |
| Grant date | Jun 6, 2017 |
| Priority date | — |
| Expiry date | Jun 6, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3459
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Provided herein are a semiconductor memory device and an operating method thereof. The semiconductor memory device may include a memory cell array, peripheral circuits, and a control logic. The memory cell array may include a plurality of memory strings. The peripheral circuits may program the memory cell array. The control logic may control the peripheral circuits and execute instructions for performing a first program operation by applying a program voltage to at least two selected word lines, among a plurality of word lines of the memory cell array, at a same time, and, after the first program operation, performing a second program operation by applying the program voltage to each of the selected word lines one at a time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.