System and method for integrated circuits with cylindrical gate structures
US9673060B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 17, 2016 |
| Grant date | Jun 6, 2017 |
| Priority date | — |
| Expiry date | May 17, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6218
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A device and method for integrated circuits with surrounding gate structures are disclosed. The device includes a semiconductor substrate and a fin structure on the semiconductor substrate. The fin structure is doped with a first conductivity type and includes a source region at one distal end and a drain region at the opposite distal end. The device further includes a gate structure overlying a channel region disposed between the source and drain regions of the fin structure. The fin structure has a rectangular cross-sectional bottom portion and an arched cross-sectional top portion. The arched cross-sectional top portion is semi-circular shaped and has a radius that is equal to or smaller than the height of the rectangular cross-sectional bottom portion. The source, drain, and the channel regions each are doped with dopants of the same polarity and the same concentration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.