Patent · US Active

Test structures and method of forming an according test structure

US9673115B2 · kind B2 · utility

0Cited by
0References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 5, 2015
Grant dateJun 6, 2017
Priority date
Expiry dateNov 6, 2035

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D86/201
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present disclosure provides a test structure which includes an SOI substrate having an active semiconductor layer, a buried insulating material layer, and a base substrate, wherein the active semiconductor layer is formed on the buried insulating material layer, which, in turn, is formed on the base substrate. The test structure further includes a contact which is formed on the active semiconductor layer and electrically coupled to the active semiconductor layer. Herein, the contact has a tip portion extending through the active semiconductor layer into the buried insulating material layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.