Constraint handling for parameterizable hardware description language
US9679092B1 · kind B1 · utility
1Cited by
15References
20Claims
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Key dates
| Filing date | Nov 3, 2015 |
| Grant date | Jun 13, 2017 |
| Priority date | — |
| Expiry date | Nov 3, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Constraint handling for a circuit design may include determining, using a processor, instances of parameterizable modules of a circuit design associated with constraints based upon a predefined hardware description language attribute within the instances, extracting, using the processor, parameter values from the instances of the parameterizable modules, and generating, using the processor, static constraint files for the instances of the parameterizable modules using the extracted parameter values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.