Shader pipeline with shared data channels
US9679347B2 · kind B2 · utility
4Cited by
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18Claims
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Key dates
| Filing date | Feb 18, 2014 |
| Grant date | Jun 13, 2017 |
| Priority date | — |
| Expiry date | Jul 8, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/80
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A graphics processing unit (GPU) may allocate a shared data channel in on-chip graphics memory of the GPU that is shared by at least two stages of a graphics processing pipeline. Shader units in the GPU may execute the at least two stages of the graphics processing pipeline. The GPU may store, in the shared data channel in on-chip graphics memory, data produced by each of the at least two stages of the graphics processing pipeline executing on the shader units.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.