Patent · US Active

Method for controlling memory device asynchronously with respect to system clock, and related memory device and memory system

US9679622B2 · kind B2 · utility

0Cited by
4References
23Claims
0Family size

Assignee

Inventors

Key dates

Filing dateApr 1, 2015
Grant dateJun 13, 2017
Priority date
Expiry dateNov 13, 2035

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C7/1066
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A control method of a memory device, a memory device and a memory system are provided. The memory system includes a memory control unit and a memory die. The memory die performs a data access operation asynchronously with respect to a system clock according to address information and an access signal generated from the memory control unit. When operating in a read mode, the memory die generates a data tracking signal according to a memory internal read time which is an elapsed time for data to be read to be read out from the memory die. The memory control unit and the memory die obtain required data according to respective data tracking signals transmitted therebetween. The control method defines an asynchronous memory interface protocol which realizes reliable and high speed data transmission.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.