Nanowires for pillar interconnects
US9679806B1 · kind B1 · utility
9Cited by
18References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2016 |
| Grant date | Jun 13, 2017 |
| Priority date | — |
| Expiry date | Jun 24, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embodiment of the invention may include a semiconductor structure, and method of forming the semiconductor structure. The semiconductor structure may include a first set of pillars located on a first substrate. The semiconductor structure may include a second set of pillars located on a second substrate. The semiconductor structure may include a joining layer connecting the first pillar to the second pillar. The semiconductor structure may include an underfill layer located between the first and second substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.