Christopher D. Muzzy
140Patents
12h-index
61Co-inventors
85Inventor score
Filing activity: Feb 20, 2002 → Jan 27, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7323780B2 | Electrical interconnection structure formation | Electricity | 59 | Active |
| US7825511B2 | Undercut-free BLM process for Pb-free and Pb-reduced C4 | Electricity | 31 | Active |
| US8742594B2 | Structure and method of making an offset-trench crackstop that forms an air gap adjacent to a passivated metal crackstop | Electricity | 28 | Active |
| US7482675B2 | Probing pads in kerf area for wafer testing | Electricity | 26 | Expired |
| US7459785B2 | Electrical interconnection structure formation | Electricity | 25 | Active |
| US7348210B2 | Post bump passivation for soft error protection | Electricity | 20 | Expired |
| US7176583B2 | Damascene patterning of barrier layer metal for C4 solder bumps | Emerging Cross-Sectional Technologies | 17 | Expired |
| US8508043B2 | Metal pad structure for thickness enhancement of polymer used in electrical interconnection of semiconductor die to semiconductor chip package substrate with solder bump | Electricity | 16 | Active |
| US8298930B2 | Undercut-repair of barrier layer metallurgy for solder bumps and methods thereof | Electricity | 15 | Active |
| US8198133B2 | Structures and methods to improve lead-free C4 interconnect reliability | Electricity | 14 | Active |
| US7985671B2 | Structures and methods for improving solder bump connections in semiconductor devices | Electricity | 14 | Active |
| US6924210B1 | Chip dicing | Performing Operations; Transporting | 13 | Expired |
| US7541272B2 | Damascene patterning of barrier layer metal for C4 solder bumps | Emerging Cross-Sectional Technologies | 12 | Active |
| US7485564B2 | Undercut-free BLM process for Pb-free and Pb-reduced C4 | Electricity | 12 | Active |
| US7112470B2 | Chip dicing | Electricity | 12 | Expired |
| US8350383B2 | IC chip package having IC chip with overhang and/or BGA blocking underfill material flow and related methods | Electricity | 10 | Active |
| US7635643B2 | Method for forming C4 connections on integrated circuit chips and the resulting devices | Electricity | 10 | Active |
| US7329951B2 | Solder bumps in flip-chip technologies | Electricity | 10 | Expired |
| US7859122B2 | Final via structures for bond pad-solder ball interconnections | Electricity | 9 | Active |
| US9679806B1 | Nanowires for pillar interconnects | Electricity | 9 | Active |
| US7316940B2 | Chip dicing | Electricity | 8 | Active |
| US8637392B2 | Solder interconnect with non-wettable sidewall pillars and methods of manufacture | Electricity | 8 | Active |
| US9799618B1 | Mixed UBM and mixed pitch on a single die | Electricity | 8 | Active |
| US7256503B2 | Chip underfill in flip-chip technologies | Electricity | 7 | Expired |
| US8476762B2 | Ni plating of a BLM edge for Pb-free C4 undercut control | Electricity | 7 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.