Threshold detection with digital correction in analog to digital converters
US9680492B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2016 |
| Grant date | Jun 13, 2017 |
| Priority date | — |
| Expiry date | Aug 24, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/468
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog to digital converter (ADC) includes a comparator and a plurality of capacitor pairs coupled between first and second inputs the comparator, where each one of the capacitor pairs corresponds to one of a plurality of cycles used by the ADC to generate a digital value representing a sampled analog voltage. The ADC also includes a voltage detection circuit and a state machine that is configured to, upon determining during a first cycle that the sampled voltage across the first and second inputs satisfies a threshold, maintaining a first pair of the plurality of capacitor pairs in a default state such that the sampled analog voltage is unchanged. Otherwise, the state machine is configured to switch the first pair of the plurality of capacitor pairs to change the sampled analog voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.