Electronic arrangement and method for producing an electronic arrangement
US9681566B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 13, 2011 |
| Grant date | Jun 13, 2017 |
| Priority date | — |
| Expiry date | Mar 16, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/882
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic arrangement (1) comprising a carrier (2), on which at least one connecting area (6) is arranged. At least one electronic component (3a, 3b, 3c) is fixed on the connecting area (6) by means of a contact material (4). A covering area (5) surrounds the connecting area (6) on the carrier (2). At least one covered region (15, 16, 17, 18, 19) is covered by a covering material (10). The covering material (10) is designed in such a way that an optical contrast between the covering area (5) and the covered region (15, 16, 17, 18, 19) is minimized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.