Apparatus and methods for multiple-channel direct memory access
US9684615B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 8, 2015 |
| Grant date | Jun 20, 2017 |
| Priority date | — |
| Expiry date | Oct 31, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
One embodiment relates to an integrated circuit for a multiple-channel direct memory access system. The integrated circuit includes multiple direct memory access (DMA) controllers, each one corresponding to a different DMA channel. A channelizer receives descriptors from the DMA controllers. Fragmentation circuits in the channelizer fragment descriptors to generate multiple sub-descriptors therefrom, and the sub-descriptors may be sorted into priority queues. Another embodiment relates to a method of providing DMA transfers for multiple DMA channels using an integrated circuit. Another embodiment relates to a system for multiple-channel direct memory access. Other embodiments and features are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.