Circuit for generating a sense amplifier enable signal with variable timing
US9685209B1 · kind B1 · utility
3Cited by
1References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2016 |
| Grant date | Jun 20, 2017 |
| Priority date | — |
| Expiry date | Apr 19, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A sense amplifier enable signal generating circuit includes an input coupled to a dummy bit line of a memory. A voltage comparator circuit compares a voltage on the dummy bit line to a threshold voltage and generates an output signal when the voltage falls below that threshold voltage. A multi-bit counter circuit counts a count value in response to the output signal. A pull-up circuit pulls up the voltage on the dummy bit line in response to the output signal. A count comparator circuit compares the count value to a count threshold and generates a sense amplifier enable signal when the count value equals the count threshold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.