Field sub-bitline nor flash array
US9685239B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 12, 2016 |
| Grant date | Jun 20, 2017 |
| Priority date | — |
| Expiry date | Oct 12, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/40
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A Field Sub-bitline NOR-type (FSNOR) flash array and its operating methods are disclosed. In contrast to the conventional NOR flash array, the FSNOR array is configured in column with multiple 90° rotated NOR pairs linked by field side sub-bitlines to achieve the minimum 4F2 cell size. The FSNOR flash array is divided into multiple sectors by selection transistors for connecting the even/odd sub-bitlines to the global main first metal bitlines. For each FSNOR sector, the two drain electrodes of column-adjacent NOR pairs form the even/odd sub-bitlines separated by trench field oxides respectively, and the common source electrodes of NOR pairs in a column form the common diffusion source lines tied with metal contacts connected to the first metal common source lines. The FSNOR flash array design has enhanced the electrical isolation of the selected NVM cell devices from the unselected NVM cell devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.