Semiconductor process
US9685316B2 · kind B2 · utility
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2References
8Claims
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Key dates
| Filing date | Feb 25, 2013 |
| Grant date | Jun 20, 2017 |
| Priority date | — |
| Expiry date | Apr 13, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3065
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor process includes the following steps. A wafer on a pedestal is provided. The pedestal is lifted to approach a heating source and an etching process is performed on the wafer. An annealing process is performed on the wafer by the heating source. In another way, a wafer on a pedestal, and a heating source on a same side of the wafer as the pedestal are provided. An etching process is performed on the wafer by setting the temperature difference between the heating source and the pedestal larger than 180° C.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.