Method of fabricating a semiconductor device including a plurality of isolation features
US9685344B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 10, 2015 |
| Grant date | Jun 20, 2017 |
| Priority date | — |
| Expiry date | Nov 10, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device includes etching a substrate to form a plurality of first trenches and a plurality of second trenches performed at an electrostatic chuck (ESC) temperature between about 90° C. to 120° C. in the substrate, wherein each trench of the plurality of first trenches extends downward from the substrate major surface to a first height, and each trench of the plurality of second trenches extends downward from the substrate major surface to a second height greater than the first height. The method includes forming a first isolation structure in each of the plurality of first trenches. The method includes forming a second isolation structure in each of the plurality of second trenches, wherein a difference between a height of the first isolation structure and the first height equals a difference between a height of the second isolation structure and the second height.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.