Determination of demarcation voltage for managing drift in non-volatile memory devices
US9691492B1 · kind B1 · utility
4Cited by
1References
24Claims
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Key dates
| Filing date | Sep 29, 2016 |
| Grant date | Jun 27, 2017 |
| Priority date | — |
| Expiry date | Sep 29, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A predetermined pattern of bits is written to a non-volatile memory device prior to powering down the non-volatile memory device. A plurality of voltages are applied to the non-volatile memory device to determine which voltage of the plurality of voltages allows the predetermined pattern of bits to be read with a least amount of error. The determined voltage is set to be a demarcation voltage for reading from the non-volatile memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.