Memory interface system
US9697145B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2015 |
| Grant date | Jul 4, 2017 |
| Priority date | — |
| Expiry date | Jul 29, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1066
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In some embodiments, a memory interface system includes a memory interface circuit and a memory controller. The memory interface circuit is configured to communicate with a memory device. The memory controller is configured, in response to the memory device operating at a first frequency, to store configuration information corresponding to the memory device operating at a second frequency. The memory controller is further configured, in response to the memory device transitioning to the second frequency, to send the configuration information to the memory interface circuit. In some embodiments, storing the configuration information may result in some memory requests being provided to the memory device more quickly, as compared to a different memory interface system where the configuration information is not stored at the memory controller. Additionally, in some embodiments, storing the configuration information may result in the configuration information being transmitted to the memory interface circuit more efficiently.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.