Metastability-hardened synchronization circuit
US9697309B1 · kind B1 · utility
0Cited by
4References
22Claims
0Family size
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Key dates
| Filing date | Sep 18, 2009 |
| Grant date | Jul 4, 2017 |
| Priority date | — |
| Expiry date | Aug 16, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/367
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) includes a metastability-hardened synchronization circuit. The metastability-hardened synchronization circuit includes a plurality of sampling circuits, and a multiplexer. The sampling circuits sample an input signal to generate a plurality of sampled signals. The multiplexer generates an output signal from the plurality of sampled signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.