Inventor · Toronto, ON, CA

David Neto

18Patents
6h-index
23Co-inventors
62Inventor score

Filing activity: Nov 15, 2002 → Nov 18, 2014

Most-cited inventions

PatentTitleAreaCited byStatus
US7555741B1 Computer-aided-design tools for reducing power consumption in programmable logic devices Physics 33 Active
US6957412B1 Techniques for identifying functional blocks in a design that match a template and combining the functional blocks into fewer programmable circuit elements Physics 19 Expired
US10599404B1 M/A for compiling parallel program having barrier synchronization for programmable hardware Physics 11 Active
US7877710B1 Method and apparatus for deriving signal activities for power analysis and optimization Physics 9 Active
US8250500B1 Method and apparatus for deriving signal activities for power analysis and optimization Physics 6 Active
US7545196B1 Clock distribution for specialized processing block in programmable logic device Physics 6 Active
US8732639B1 Method and apparatus for protecting, optimizing, and reporting synchronizers Physics 5 Active
US7587620B1 Power reduction techniques for components in integrated circuits by assigning inputs to a plurality of ports based on power consumption ratings Physics 4 Active
US7774729B1 Method and apparatus for reducing dynamic power in a system Physics 3 Active
US7877555B1 Power-aware RAM processing Physics 2 Active
US8898603B1 Method and apparatus for deriving signal activities for power analysis and optimization Physics 2 Expired
US9342640B1 Method and apparatus for protecting, optimizing, and reporting synchronizers Physics 1 Active
US8499273B1 Systems and methods for optimizing placement and routing Physics 1 Active
US10417362B1 Method and apparatus for deriving signal activities for power analysis and optimization Physics 1 Active
US9330733B1 Power-aware RAM processing Physics 1 Active
US8001537B1 Method and apparatus for compiling programmable logic device configurations Physics 1 Active
US9697309B1 Metastability-hardened synchronization circuit Physics 0 Active
US8015425B1 Power reduction techniques for components in integrated circuits Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.