Patent · US Active

Digital controller for a phase-locked loop

US9698798B1 · kind B1 · utility

15Cited by
9References
34Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 29, 2016
Grant dateJul 4, 2017
Priority date
Expiry dateJul 29, 2036

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M7/16
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A digital control loop circuit is disclosed which is coupleable to an oscillator to form a configurable, digital phase-locked loop to generate an output signal having a configurable or selectable output frequency. A representative embodiment of the digital control loop circuit may include a memory storing a plurality of configuration parameters, at least one configuration parameter specifying the output frequency; and a digital controller coupleable to receive an input signal from a reference frequency generator having a reference frequency, the digital controller adapted to access the memory and retrieve the plurality of configuration parameters, and to generate a plurality of control signals to the oscillator both to generate the output signal having the output frequency in response to the plurality of configuration parameters, and to match a phase of the output signal to an input signal phase.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.