Jeffrey Alan Fredenburg
27Patents
3h-index
15Co-inventors
52Inventor score
Filing activity: Jul 29, 2016 → Feb 1, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9698798B1 | Digital controller for a phase-locked loop | Electricity | 15 | Active |
| US9762249B1 | Reconfigurable phase-locked loop | Electricity | 4 | Active |
| US9680480B1 | Fractional and reconfigurable digital phase-locked loop | Electricity | 3 | Active |
| US9705516B1 | Reconfigurable phase-locked loop with optional LC oscillator capability | Electricity | 3 | Active |
| US10972106B1 | Phase and delay compensation circuit and method | Electricity | 3 | Active |
| US11070216B2 | Locked loop circuit and method with digitally-controlled oscillator (DCO) gain normalization | Electricity | 2 | Active |
| US10972119B1 | Regulated charge sharing analog-to-digital converter (ADC) apparatus and methods | Electricity | 1 | Active |
| US10972115B1 | Methods and apparatus for calibrating a regulated charge sharing analog-to-digital converter (ADC) | Electricity | 1 | Active |
| US11493950B2 | Frequency counter circuit for detecting timing violations | Electricity | 1 | Active |
| US10594323B2 | Locked loop circuit and method with digitally-controlled oscillator (DCO) gain normalization | Electricity | 1 | Active |
| US11017138B2 | Timing analysis for parallel multi-state driver circuits | Physics | 0 | Active |
| US10031992B2 | Concurrently optimized system-on-chip implementation with automatic synthesis and integration | Physics | 0 | Active |
| US12425014B1 | Self-aligning interconnect for a digital system | Electricity | 0 | Active |
| US11496139B2 | Frequency measurement circuit with adaptive accuracy | Electricity | 0 | Active |
| US10614182B2 | Timing analysis for electronic design automation of parallel multi-state driver circuits | Physics | 0 | Active |
| US11374578B2 | Zero-offset phase detector apparatus and method | Electricity | 0 | Active |
| US11070215B2 | Locked loop circuit and method with digitally-controlled oscillator (DCO) gain normalization | Electricity | 0 | Active |
| US12366882B2 | Field programmable platform array | Electricity | 0 | Active |
| US12019464B2 | Digital system synchronization | Electricity | 0 | Active |
| US10713409B2 | Integrated circuit design system with automatic timing margin reduction | Emerging Cross-Sectional Technologies | 0 | Active |
| US11831318B1 | Frequency multiplier system with multi-transition controller | Electricity | 0 | Active |
| US10587275B2 | Locked loop circuit with configurable second error input | Electricity | 0 | Active |
| US10740526B2 | Integrated circuit design system with automatic timing margin reduction | Emerging Cross-Sectional Technologies | 0 | Active |
| US11128308B2 | Regulated charge sharing apparatus and methods | Electricity | 0 | Active |
| US10158365B2 | Digital, reconfigurable frequency and delay generator with phase measurement | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.