Packet based integrated circuit testing
US9702935B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2014 |
| Grant date | Jul 11, 2017 |
| Priority date | — |
| Expiry date | Jan 6, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318575
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Apparatus and method for testing an integrated circuit. An integrated circuit includes circuitry to be tested, scan chain logic, and a test adapter. The scan chain logic is configured to transfer test data to and test results from the circuitry. The test adapter is configured to extract the test data from a packet received from an automated test control system and to transfer the test data to the scan chain logic. The test adapter is also configured to receive the test results from the scan chain logic, and to packetize the test result for transmission to the automated test control system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.