Patent · US Active

Debug environment for a multi user hardware assisted verification system

US9703579B2 · kind B2 · utility

4Cited by
34References
15Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 1, 2013
Grant dateJul 11, 2017
Priority date
Expiry dateMay 1, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F11/3652
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

Technologies for debugging hardware errors discovered during hardware assisted software verification processes are provided. For example, in one embodiment, a concurrent emulation debug environment including a concurrent emulation system, an emulation trace module and a model state module is provided. The concurrent emulation system includes an emulator and an emulation control station configured to allow simultaneous emulation of multiple electronic designs. The model state module is configured to record the state of the electronic designs during emulation and the emulation trace module is configured to capture trace data associated with the emulation. A backup and capture module is also disclosed that is configured to store the recorded state and the captured trace data for use during a hardware debug process.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.