Apparatus and method for memory overlay
US9703593B2 · kind B2 · utility
2Cited by
7References
16Claims
0Family size
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Key dates
| Filing date | Jan 3, 2013 |
| Grant date | Jul 11, 2017 |
| Priority date | — |
| Expiry date | Jan 3, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/461
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory overlay apparatus includes an internal memory that includes a dirty bit indicating a changed memory area, a memory management unit that controls an external memory to store only changed data so that only data actually being used by a task during overlay is stored and restored, and a direct memory access (DMA) management unit that confirms the dirty bit when the task is changed and that moves a data area of the task between the internal memory and the external memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.