Chae Seok Im
27Patents
2h-index
34Co-inventors
53Inventor score
Filing activity: Aug 28, 2006 → Mar 23, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8239838B2 | Kernel-aware debugging system, medium, and method | Physics | 15 | Active |
| US7836291B2 | Method, medium, and apparatus with interrupt handling in a reconfigurable array | Physics | 8 | Active |
| US9672084B2 | Method of generating automatic code for remote procedure call | Physics | 2 | Active |
| US7877535B2 | Processor and interrupt handling method | Physics | 2 | Active |
| US8677362B2 | Apparatus for reconfiguring, mapping method and scheduling method in reconfigurable multi-processor system | Physics | 2 | Active |
| US8612982B2 | Multi-tasking method according to simple priority inheritance scheme and embedded system therefor | Physics | 2 | Active |
| US9703593B2 | Apparatus and method for memory overlay | Physics | 2 | Active |
| US8127110B2 | Method, system, and medium for providing interprocessor data communication | Emerging Cross-Sectional Technologies | 1 | Active |
| US8402410B2 | Method and apparatus for managing configuration memory of reconfigurable hardware | Physics | 1 | Active |
| US8635627B2 | Method, medium and apparatus storing and restoring register context for fast context switching between tasks | Physics | 1 | Active |
| US8713573B2 | Synchronization scheduling apparatus and method in real-time multi-core system | Physics | 1 | Active |
| US8327122B2 | Method and system for providing context switch using multiple register file | Physics | 1 | Active |
| US11907826B2 | Electronic apparatus for operating machine learning and method for operating machine learning | Physics | 0 | Active |
| US9383981B2 | Method and apparatus of instruction scheduling using software pipelining | Physics | 0 | Active |
| US9141436B2 | Apparatus and method for partition scheduling for a processor with cores | Physics | 0 | Active |
| US9870042B2 | Apparatus and method managing power based on data | Emerging Cross-Sectional Technologies | 0 | Active |
| US9047180B2 | Computing system, method and computer-readable medium processing debug information in computing system | Physics | 0 | Active |
| US7831809B2 | Method for reducing code size of a program in code memory by dynamically storing an instruction into a memory location following a group of instructions indicated by an offset operand and either a length operand or a bitmask operand of an echo instruction | Physics | 0 | Active |
| US9152547B2 | Apparatus and method for scratch pad memory management | Physics | 0 | Active |
| US9501114B2 | Apparatus and method for managing power based on data | Emerging Cross-Sectional Technologies | 0 | Active |
| US10318452B2 | Processor and controlling method thereof to process an interrupt | Physics | 0 | Active |
| US10866817B2 | Computing system, and driving method and compiling method thereof | Emerging Cross-Sectional Technologies | 0 | Active |
| US8875151B2 | Load balancing method and apparatus in symmetric multi-processor system | Physics | 0 | Active |
| US8688885B2 | Hardware acceleration apparatus, method and computer-readable medium efficiently processing multi-core synchronization | Emerging Cross-Sectional Technologies | 0 | Active |
| US9158551B2 | Activating and deactivating Operating System (OS) function based on application type in manycore system | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.